1. Field of the Invention
The present invention is generally in the field of memory devices. More particularly, the present invention relates to programmable memory cells.
2. Background Art
One type of conventional one-time programmable memory cell is implemented using an antifuse and an access transistor situated at the intersection of a row line and a column line (i.e. a bit line). The antifuse is coupled between the column line and the access transistor drain. The access transistor gate is coupled to the row line, and the access transistor source is coupled to ground. When the antifuse is unprogrammed, no current can pass through the antifuse and access transistor, because the antifuse is an open circuit. This state corresponds to an unprogrammed state of the memory cell. To program the memory cell, a programming voltage is applied to the column line, rupturing the antifuse. When the programmed memory cell is read, a conductive path is formed from the column line (i.e. the bit line) through the rupture site in the antifuse and to ground through the access transistor.
This type of conventional memory cell may exhibit an unpredictable and wide range of IV (current-voltage) characteristics after being programmed, because the antifuse rupture site location is a big variable. For example, the antifuse may rupture near the access transistor drain, resulting in one set of IV characteristics, or far from the access transistor drain, resulting in a different set of IV characteristics. This variation in IV characteristics between different programmed memory cells makes it difficult to determine whether a particular memory cell has been properly programmed, and what value is stored in the memory cell. Such difficulty can require the implementation of redundancy schemes or other costly compensatory measures.
Thus, there is a need in the art for a one-time programmable memory cell that exhibits improved predictability and improved IV characteristics.